Semiconductor integrated circuit (IC) is constructed by transistors built on a semiconductor substrate and upper layer wires used to connect transistors. The patterns of the transistors and wires are determined in the IC design stage. The interconnections between the transistors cannot be changed after fabrication.
In reconfigurable circuits such as FPGAs (Field-Programmable Gate Arrays), configuration data including logic operation and interconnection information is stored in memories, so that different logic operations and interconnections can be realized by configuring the memories after fabrication according to requirements of end users. Moreover, multi-context FPGAs with multi-context configuration memory allow most applications to achieve greater logic density than conventional FPGAs by reusing hardware resources, where stored multiple sets of configuration data can be switched quickly in a time-multiplexed manner.
FIG. 1 illustrates a time-multiplexed switch element that can realize runtime-changeable data signal routing described in patent document 1. Four paths are parallel connected between two wires W1 and W2. At each path, a first pass transistor (Tr1-Tr4) controlled by a configuration memory (M1-M4) is serially connected to a second pass transistor (Tr5-Tr8) controlled by a time control signal (S1-S4). Second pass transistors Tr5-Tr8 choose one of the four paths to connect wire W1 with wire W2, and configuration memories M1-M4 that store four kinds of configuration data turn first pass transistors Tr1-Tr4 ON/OFF at different times.
In most of commercial FPGAs, SRAM (Static Random Access Memory) is used to store the configuration data. Typically, each SRAM is composed of 6 transistors and each modern FPGA chip has more than 10M SRAMs, which causes extremely large area overhead and cost.
To overcome the problems of SRAM-based FPGAs, non-volatile resistive switches (NVRSs) integrated between the wires on a transistor layer have been proposed for small area overhead. Non-volatility also contributes to zero standby power consumption.
As an example, in the reconfigurable circuits shown in non-patent document 1 and patent document 2, a non-volatile resistive switch (NVRS) that is composed of a solid-electrolyte sandwiched between an active electrode (Cu) and an inert electrode (Ru) has high OFF/ON resistance ratio (>105), therefore the NVRS can replace the CMOS switch to achieve small area overhead and high logic density. Moreover, lower capacitance of the NVRS than nMOS transistor leads to low power consumption and high speed. Since the ON/OFF state of the NVRS is a hold state even when not powered, configuration data can be loaded immediately when power is turned on. Non-patent document 3 describes that the NVRS has very small load capacitance.